Career Profile
M.S.–Ph.D. candidate at the Graduate School of Semiconductor Technology (GSST), POSTECH, affiliated with the CAD & SoC Design Lab under Prof. Seokhyeong Kang. Completed a double major in Electrical Engineering and Computer Science at POSTECH. Research interests include machine learning acceleration and optimization, with a focus on hardware-aware design and efficient computing systems. Experienced in low-power design and deep learning model optimization.